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VLSI中高性能X结构多层总体布线器

刘耿耿 庄震 郭文忠 陈国龙

刘耿耿, 庄震, 郭文忠, 陈国龙. VLSI中高性能X结构多层总体布线器. 自动化学报, 2020, 46(1): 79-93. doi: 10.16383/j.aas.c170714
引用本文: 刘耿耿, 庄震, 郭文忠, 陈国龙. VLSI中高性能X结构多层总体布线器. 自动化学报, 2020, 46(1): 79-93. doi: 10.16383/j.aas.c170714
LIU Geng-Geng, ZHUANG Zhen, GUO Wen-Zhong, CHEN Guo-Long. A High Performance X-architecture Multilayer Global Router for VLSI. ACTA AUTOMATICA SINICA, 2020, 46(1): 79-93. doi: 10.16383/j.aas.c170714
Citation: LIU Geng-Geng, ZHUANG Zhen, GUO Wen-Zhong, CHEN Guo-Long. A High Performance X-architecture Multilayer Global Router for VLSI. ACTA AUTOMATICA SINICA, 2020, 46(1): 79-93. doi: 10.16383/j.aas.c170714

VLSI中高性能X结构多层总体布线器

doi: 10.16383/j.aas.c170714
基金项目: 

国家重点基础研究发展计划(973计划) 2011CB808000

国家自然科学基金 61877010

国家自然科学基金 11501114

福建省自然科学基金 2019J01243

福建省科技创新平台项目 2014H2005

福建省科技创新平台项目 2009J1007

详细信息
    作者简介:

    刘耿耿  福州大学数学与计算机科学学院副教授. 2015年获得福州大学应用数学博士学位.主要研究方向为计算智能及超大规模集成电路物理设计算法研究. E-mail:liugenggeng@fzu.edu.cn

    庄震  福州大学数学与计算机科学学院硕士研究生.主要研究方向为超大规模集成电路物理设计算法研究.E-mail:zhuang_zhen@126.com

    陈国龙  福州大学数学与计算机科学学院教授. 2002年获得西安交通大学计算机科学博士学位.主要研究方向为计算智能及其应用. E-mail: fzucgl@163.com

    通讯作者:

    郭文忠 福州大学数学与计算机科学学院教授. 2010年获得福州大学通信与信息系统博士学位.主要研究方向为计算智能及其应用.本文通信作者.E-mail: fzugwz@163.com

A High Performance X-architecture Multilayer Global Router for VLSI

Funds: 

National Basic Research Program of China (973 Program) 2011CB808000

National Natural Science Foundation of China 61877010

National Natural Science Foundation of China 11501114

Natural Science Foundation of Fujian Province 2019J01243

Technology Innovation Platform Project of Fujian Province 2014H2005

Technology Innovation Platform Project of Fujian Province 2009J1007

More Information
    Author Bio:

    LIU Geng-Geng   Associate professor at the College of Mathematics and Computer Science, Fuzhou University. He received his Ph. D. degree from Fuzhou University in 2015. His research interest covers computational intelligence and very large scale integration physical design.)

    ZHUANG Zhen   Master student at the College of Mathematics and Computer Science from Fuzhou University. His research interest covers very large scale integration physical design.)

    CHEN Guo-Long   Professor at the College of Mathematics and Computer Science, Fuzhou University. He received his Ph. D degree in Computer Science from Xi\begin{document}$'$\end{document}an Jiaotong University in 2002. His research interest covers computation intelligence.)

    Corresponding author: GUO Wen-Zhong  Professor at the College of Mathematics and Computer Science, Fuzhou University. He received his Ph. D degree in Communication and Information System from Fuzhou University in 2010. His research interest covers computational intelligence and its application. Corresponding author of this paper.)
  • 摘要: X结构带来物理设计诸多性能的提高, 该结构的引入和多层工艺的普及, 使得总体布线算法更复杂.为此, 在XGRouter布线器的基础上, 本文设计了三种有效的加强策略, 包括: 1)增加新类型的布线方式; 2)粒子群优化(Particle swarm optimization, PSO)算法与基于新布线代价的迷宫布线的结合; 3)初始阶段中预布线容量的缩减策略, 继而引入了多层布线模型, 简化了XGRouter的整数线性规划模型, 最终构建了一种高性能的X结构多层总体布线器, 称为ML-XGRouter.在标准测试电路的仿真实验结果表明, ML-XGRouter相对其他各类总体布线器, 在多层总体布线中最重要的优化目标——溢出数和线长总代价两个指标上均取得最佳.
    Recommended by Associate Editor WANG Ding
    1)  本文责任编委  王鼎
  • 图  1  总体布线图

    Fig.  1  The design graph of global routing

    图  2  初始布线阶段由于布线容量约束造成未能直接连线的4种情况

    Fig.  2  The four cases of the failure to connect directly due to the limitation of routing capacity in the initial stage

    图  3  E1策略

    Fig.  3  E1 Strategy

    图  4  E2策略

    Fig.  4  E2 Strategy

    图  5  E3策略

    Fig.  5  E3 Strategy

    图  6  ML-XGRouter的算法流程

    Fig.  6  The flow chart of ML-XGRouter

    图  7  总体布线问题的实例

    Fig.  7  An instance for the global routing problem

    图  8  图 7(b)中布线实例的编码图

    Fig.  8  The encoding for the routing instance in Fig. 7 (b)

    图  9  本文的两种操作算子

    Fig.  9  Two operators in this paper

    表  1  未采用和采用E1策略(E2策略)的布线结果对比

    Table  1  Comparison of routing results without and with E1 strategy (E2 strategy)

    基准 E0 E1 减少率(%) E2 减少率(%)
    电路 TOF TWL TOF TWL TOF TWL TOF TWL TOF TWL
    11 85 46.7 85 46.9 0 -0.43 0 47.9 100 -2.57
    12 75 45.9 70 45.8 6.67 0.22 0 46.6 100 -1.53
    13 44 127.1 34 127.2 22.73 -0.08 0 128.9 100 -1.42
    14 12 110.8 7 110.9 41.67 -0.09 0 111 100 -0.18
    15 32 130.8 29 131.4 9.38 -0.46 0 130.3 100 0.38
    16 2 33.9 1 33.9 50 0 0 33.9 100 0
    17 0 63.4 0 63.3 0 0.16 0 63.5 0 -0.16
    18 3 779 80 3 682 80 2.57 0 3 170 80.8 16.12 -1
    AVG 16.63 -0.09 77.01 -0.81
    下载: 导出CSV

    表  2  在E1策略(E2策略)的基础上未采用和采用E3策略的布线结果对比

    Table  2  Comparison of routing results without and with E3 strategy, on the basis of E1 strategy (E2 strategy)

    基准 E1 E1+E3 减少率(%) E2 E2+E3 减少率(%)
    电路 TOF TWL TOF TWL TOF TWL TOF TWL TOF TWL TOF TWL
    11 85 46.9 68 46.4 20 1.07 0 47.9 0 47.5 0 0.84
    12 70 45.8 49 44.4 30 3.06 0 46.6 0 45.6 0 2.15
    13 34 127.2 27 123.7 20.59 2.75 0 128.9 0 127.4 0 1.16
    14 7 110.9 7 110.2 0 0.63 0 111 0 110.7 0 0.27
    15 29 131.4 13 127.7 55.17 2.82 0 130.3 0 129.8 0 0.38
    16 1 33.9 1 33.9 0 0 0 33.9 0 34 0 -0.3
    17 0 63.3 0 63 0 0.47 0 63.5 0 64.2 0 -1.1
    18 3 682 80 3 226 80.5 12.38 -0.63 3 170 80.8 3 165 81 0.16 -0.25
    AVG 17.27 1.27 0.02 0.39
    下载: 导出CSV

    表  3  在E1和E2策略共同作用的基础上未采用和采用E3策略的布线结果对比

    Table  3  Comparison of routing results without and with E3 strategy, on the basis of E1 and E2 strategies

    基准 E1+E2 E1+E2+ E3 减少率(%)
    电路 TOF TWL TOF TWL TOF TWL
    11 0 47.8 0 47 0 1.67
    12 0 46.5 0 45 0 3.23
    13 0 128.8 0 124.6 0 3.26
    14 0 110.9 0 110.1 0 0.72
    15 0 130.2 0 126.8 0 2.61
    16 0 33.9 0 33.9 0 0
    17 0 63.4 0 63.1 0 0.47
    18 3 106 80.8 2 762 81.1 11.08 -0.37
    AVG 1.38 1.45
    下载: 导出CSV

    表  4  在ISPD98测试电路的属性及初始布线的结果

    Table  4  ISPD98 benchmark circuits and the results of the initial stage

    基准电路初始布线情况
    名称 网格大小 线网数 bf.nets af.nets Ratio (%)
    ibm01 64 $\times$ 64 11 507 25 698 20 127 78.32
    ibm02 80 $\times$ 64 18 429 55 739 39 871 71.53
    ibm03 80 $\times$ 64 21 621 43 272 30 181 69.75
    ibm04 96 $\times$ 64 26 163 49 821 34 193 68.63
    ibm06 128 $\times$ 64 33 354 75 912 59 812 78.79
    ibm07 192 $\times$ 64 44 394 97 391 69 123 70.97
    ibm08 192 $\times$ 64 47 944 121 912 89 134 73.11
    ibm09 256 $\times$ 64 50 393 115 871 91 268 78.77
    ibm10 256 $\times$ 64 64 227 169 391 113 459 66.98
    AVG 72.98
    下载: 导出CSV

    表  5  在ISPD07测试电路的属性及初始布线的结果

    Table  5  ISPD07 benchmark circuits and the results of the initial stage

    基准电路初始布线情况
    名称 网格大小 线网数 bf.nets af.nets e3.af.nets Ratio (%) e3.Ratio (%)
    11 324 $\times$ 324 219 794 560 406 430 376 428 383 76.8 76.44
    12 424 $\times$ 424 260 159 600 317 452 931 450 048 75.45 74.97
    13 774 $\times$ 779 466 295 1 093 066 829 270 825 112 75.87 75.49
    14 774 $\times$ 779 515 304 1 075 147 783 478 782 257 72.87 72.76
    15 465 $\times$ 468 867 441 1 664 608 1 319 629 1 307 906 79.28 78.57
    16 399 $\times$ 399 331 663 657 467 528 243 527 043 80.35 80.16
    17 557 $\times$ 463 463 213 956 459 743 183 738 101 77.7 77.17
    18 973 $\times$ 1 256 551 667 936 162 700 745 699 252 74.85 74.69
    AVG 76.65 76.28
    下载: 导出CSV

    表  6  在E3的基础上E1策略或(和) E2策略结合后的优化情况

    Table  6  The optimization results with the combination of E1 strategy or (and) E2 strategy based on E3 strategy

    基准 EO E1+E3 E2+E3 E1+E2+E3
    电路 TOF TWL TOF TWL TOF TWL TOF TWL
    11 85 46.7 68 46.4 0 47.5 0 47
    12 75 45.9 49 44.4 0 45.6 0 45
    13 44 127.1 27 123.7 0 127.4 0 124.6
    14 12 110.8 7 110.2 0 110.7 0 110.1
    15 32 130.8 13 127.7 0 129.8 0 126.8
    16 2 33.9 1 33.9 0 34 0 33.9
    17 0 63.4 0 63 0 64.2 0 63.1
    18 3 779 80 3 226 80.5 3 165 81 2 762 81.1
    Comp. 100 100 67.63 98.91 22.97 100.41 21.64 99.24
    下载: 导出CSV

    表  7  在ISPD98上与5种总体布线算法的对比

    Table  7  Comparison between our algorithm and five global routing algorithms on ISPD98

    基准 算法 减少率(%)
    电路 [3] [5] [2] [4] [6] Ours [3] [5] [2] [4] [6]
    ibm01 63 332 64 389 62 659 63 720 62 498 58 564 7.53 9.05 6.54 8.09 6.29
    ibm02 168 918 171 805 171 110 170 342 169 881 158 383 6.24 7.81 7.44 7.02 6.77
    ibm03 146 412 146 770 146 634 147 078 146 458 136 313 6.9 7.12 7.04 7.32 6.93
    ibm04 167 101 169 977 167 275 170 095 166 452 153 190 8.32 9.88 8.42 9.94 7.97
    ibm06 277 608 278 841 277 913 279 566 277 696 261 606 5.76 6.18 5.87 6.42 5.79
    ibm07 366 180 370 143 365 790 369 340 366 133 341 170 6.83 7.83 6.73 7.63 6.82
    ibm08 404 714 404 530 405 634 406 349 404 976 379 684 6.18 6.14 6.4 6.56 6.25
    ibm09 413 053 414 223 413 862 415 852 414 738 389 281 5.76 6.02 5.94 6.39 6.14
    ibm10 578 795 583 805 590 141 585 921 579 870 541 839 6.38 7.19 8.18 7.52 6.56
    AVE 6.66 7.47 6.95 7.43 6.61
    下载: 导出CSV

    表  8  在ISPD07上与2种串行算法的总体布线算法的对比

    Table  8  Comparison between our algorithm and two serial global routing algorithms on ISPD07

    算法 减少率(%)
    基准 [6] [8] Ours [6] [8]
    电路 TOF TWL TOF TWL TOF TWL TOF TWL TOF TWL
    11 0 55.9 0 53.5 0 47 0 15.92 0 12.15
    12 0 54 0 51.69 0 45 0 16.67 0 12.94
    13 0 134.4 0 130.35 0 124.6 0 7.29 0 4.41
    14 0 127.8 0 120.67 0 110.1 0 13.85 0 8.76
    15 0 157 0 154.7 0 126.8 0 19.24 0 18.03
    16 0 48.6 0 45.99 0 33.9 0 30.25 0 26.29
    17 0 78.5 0 74.88 0 63.1 0 19.62 0 15.73
    18 31 390 94.9 31 454 104.28 2 762 81.1 91.2 14.54 91.22 22.23
    AVE 11.4 17.17 11.4 15.07
    下载: 导出CSV

    表  9  在ISPD07上与2种并行算法的总体布线算法的对比

    Table  9  Comparison between our algorithm and two concurrent global routing algorithms on ISPD07

    算法 减少率(%)
    基准 [11] [12] Ours [11] [12]
    电路 TOF TWL TOF TWL TOF TWL TOF TWL TOF TWL
    11 0 52.82 0 54.3 0 47 0 11.02 0 13.44
    12 0 51.46 0 52.9 0 45 0 12.55 0 14.93
    13 0 128.92 0 131 0 124.6 0 3.35 0 4.89
    14 0 119.96 0 124 0 110.1 0 8.22 0 11.21
    15 0 153.23 0 155 0 126.8 0 17.25 0 18.19
    16 228 45.58 228 47 0 33.9 100 25.63 100 27.87
    17 0 74.46 0 77.9 0 63.1 0 15.26 0 19
    18 31 026 107.22 31 484 108.5 2 762 81.1 91.1 24.36 91.23 25.25
    AVE 23.89 14.7 23.9 16.85
    下载: 导出CSV
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  • 收稿日期:  2017-12-21
  • 录用日期:  2018-04-16
  • 刊出日期:  2020-01-21

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